@juliobiason Viva la 6502. 😉
@juliobiason All I can say about it is "duh"…
OTOH, x86 isn't that special, and it's main disadvantage is non-technical, but that it's IP'd, thus can't evolve.
@amiloradovsky You have no idea how much I wanted ARM to be that architecture, but it seems they are doing the same mistakes.
@juliobiason What is ARM? A company existing solely because of the IP and spreading FUD about RISC-V in particular. Nah, next.
It's ironic that Itanium was the closest we've seen to what the author was arguing for, and now Intel is the worst offender. I'd really hoped to see Intel try again with Itanium on 10 or 14 nm, but it seems they're all in on AMD64. It's too bad.
• even if ARM is just as evil as the x86 oligopoly (which isn't the case, IMO), more competition there is better
• the problem with Itanium was non-technical — it was simply boycotted, because it was no less (or more) IP'd
• looking at the list of Qemu's supported ISAs, I guess, there is plenty of candidates, besides Itanium, to revive…
• AFAIK, no flavor of RISC-V is targeted at HPC, but extending it into EPIC/WLIW isn't the problem, the compilers are
@amiloradovsky @juliobiason It's a chicken/egg problem, a language problem, and a social one. EPIC is interesting, and was successful in a technical sense. The performance of Intel Fortran on IA-64 was fantastic. Intel C got good results, too, though less impressive.
I remember the major objections being that g++/visualc++ codebases didn't run much better there. Today with Spectre and plateauing clocks, things could be different for EPIC.
The advantage of explicit parallelism is that the compiler's parallelization is potentially more optimal (shorter time), since it's "window" is only restricted by the available RAM. So, for some programs, it may indeed be faster, but not by far amount.
And the better energy-efficiency. And the lesser complexity, and thus associated risks, of course.
@juliobiason and C for FFI lingua Franca / linking target
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